456 lines
9.5 KiB
C
456 lines
9.5 KiB
C
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/*********************************************************
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* Copyright (C) 2003-2015 VMware, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU Lesser General Public License as published
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* by the Free Software Foundation version 2.1 and no later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the Lesser GNU General Public
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* License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*********************************************************/
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/*********************************************************
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* The contents of this file are subject to the terms of the Common
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* Development and Distribution License (the "License") version 1.0
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* and no later version. You may not use this file except in
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* compliance with the License.
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*
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* You can obtain a copy of the License at
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* http://www.opensource.org/licenses/cddl1.php
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*
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* See the License for the specific language governing permissions
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* and limitations under the License.
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*
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*********************************************************/
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/*
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* x86cpuid_asm.h
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*
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* CPUID-related assembly functions.
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*/
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#ifndef _X86CPUID_ASM_H_
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#define _X86CPUID_ASM_H_
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#include "vm_basic_asm.h"
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#include "x86cpuid.h"
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/*
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* x86-64 windows doesn't support inline asm so we have to use these
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* intrinsic functions defined in the compiler. Not all of these are well
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* documented. There is an array in the compiler dll (c1.dll) which has
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* an array of the names of all the intrinsics minus the leading
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* underscore. Searching around in the ntddk.h file can also be helpful.
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*
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* The declarations for the intrinsic functions were taken from the DDK.
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* Our declarations must match the ddk's otherwise the 64-bit c++ compiler
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* will complain about second linkage of the intrinsic functions.
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* We define the intrinsic using the basic types corresponding to the
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* Windows typedefs. This avoids having to include windows header files
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* to get to the windows types.
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*/
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#ifdef _MSC_VER
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef VM_X86_64
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/*
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* intrinsic functions only supported by x86-64 windows as of 2k3sp1
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*/
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void __cpuid(int regs[4], int eax);
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#pragma intrinsic(__cpuid)
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#endif /* VM_X86_64 */
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#ifdef __cplusplus
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}
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#endif
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#endif /* _MSC_VER */
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#ifdef __GNUC__ // {
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/*
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* Checked against the Intel manual and GCC --hpreg
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*
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* Need __volatile__ and "memory" since CPUID has a synchronizing effect.
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* The CPUID may also change at runtime (APIC flag, etc).
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*
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*/
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/*
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* %ebx is reserved on i386 PIC. Apple's gcc-5493 (gcc 4.0) compiling
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* for x86_64 incorrectly errors out saying %ebx is reserved. This is
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* Apple bug 7304232.
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*/
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#if vm_x86_64 ? (defined __APPLE_CC__ && __APPLE_CC__ == 5493) : defined __PIC__
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#if vm_x86_64
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/*
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* Note that this generates movq %rbx,%rbx; cpuid; xchgq %rbx,%rbx ...
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* Unfortunately Apple's assembler does not have .ifnes, and I cannot
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* figure out how to do that with .if. If we ever enable this code
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* on other 64bit systems, both movq & xchgq should be surrounded by
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* .ifnes \"%%rbx\", \"%q1\" & .endif
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*/
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#define VM_CPUID_BLOCK "movq %%rbx, %q1\n\t" \
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"cpuid\n\t" \
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"xchgq %%rbx, %q1\n\t"
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#define VM_EBX_OUT(reg) "=&r"(reg)
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#else
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#define VM_CPUID_BLOCK "movl %%ebx, %1\n\t" \
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"cpuid\n\t" \
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"xchgl %%ebx, %1\n\t"
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#define VM_EBX_OUT(reg) "=&rm"(reg)
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#endif
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#else
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#define VM_CPUID_BLOCK "cpuid"
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#define VM_EBX_OUT(reg) "=b"(reg)
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#endif
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static INLINE void
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__GET_CPUID(int eax, // IN
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CPUIDRegs *regs) // OUT
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{
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__asm__ __volatile__(
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VM_CPUID_BLOCK
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: "=a" (regs->eax), VM_EBX_OUT(regs->ebx), "=c" (regs->ecx), "=d" (regs->edx)
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: "a" (eax)
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: "memory"
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);
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}
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static INLINE void
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__GET_CPUID2(int eax, // IN
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int ecx, // IN
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CPUIDRegs *regs) // OUT
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{
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__asm__ __volatile__(
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VM_CPUID_BLOCK
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: "=a" (regs->eax), VM_EBX_OUT(regs->ebx), "=c" (regs->ecx), "=d" (regs->edx)
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: "a" (eax), "c" (ecx)
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: "memory"
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);
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}
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static INLINE uint32
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__GET_EAX_FROM_CPUID(int eax) // IN
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{
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uint32 ebx;
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__asm__ __volatile__(
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VM_CPUID_BLOCK
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: "=a" (eax), VM_EBX_OUT(ebx)
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: "a" (eax)
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: "memory", "%ecx", "%edx"
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);
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return eax;
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}
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static INLINE uint32
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__GET_EBX_FROM_CPUID(int eax) // IN
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{
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uint32 ebx;
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__asm__ __volatile__(
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VM_CPUID_BLOCK
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: "=a" (eax), VM_EBX_OUT(ebx)
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: "a" (eax)
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: "memory", "%ecx", "%edx"
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);
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return ebx;
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}
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static INLINE uint32
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__GET_ECX_FROM_CPUID(int eax) // IN
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{
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uint32 ecx;
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uint32 ebx;
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__asm__ __volatile__(
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VM_CPUID_BLOCK
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: "=a" (eax), VM_EBX_OUT(ebx), "=c" (ecx)
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: "a" (eax)
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: "memory", "%edx"
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);
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return ecx;
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}
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static INLINE uint32
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__GET_EDX_FROM_CPUID(int eax) // IN
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{
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uint32 edx;
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uint32 ebx;
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__asm__ __volatile__(
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VM_CPUID_BLOCK
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: "=a" (eax), VM_EBX_OUT(ebx), "=d" (edx)
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: "a" (eax)
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: "memory", "%ecx"
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);
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return edx;
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}
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static INLINE uint32
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__GET_EAX_FROM_CPUID4(int ecx) // IN
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{
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uint32 eax;
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uint32 ebx;
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__asm__ __volatile__(
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VM_CPUID_BLOCK
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: "=a" (eax), VM_EBX_OUT(ebx), "=c" (ecx)
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: "a" (4), "c" (ecx)
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: "memory", "%edx"
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);
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return eax;
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}
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#undef VM_CPUID_BLOCK
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#undef VM_EBX_OUT
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#elif defined(_MSC_VER) // } {
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static INLINE void
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__GET_CPUID(int input, CPUIDRegs *regs)
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{
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#ifdef VM_X86_64
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__cpuid((int *)regs, input);
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#else
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__asm push esi
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__asm push ebx
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__asm push ecx
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__asm push edx
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__asm mov eax, input
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__asm mov esi, regs
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__asm _emit 0x0f __asm _emit 0xa2
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__asm mov 0x0[esi], eax
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__asm mov 0x4[esi], ebx
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__asm mov 0x8[esi], ecx
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__asm mov 0xC[esi], edx
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__asm pop edx
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__asm pop ecx
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__asm pop ebx
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__asm pop esi
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#endif
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}
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#ifdef VM_X86_64
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/*
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* No inline assembly in Win64. Implemented in bora/lib/misc in
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* cpuidMasm64.asm.
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*/
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extern void
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__GET_CPUID2(int inputEax, int inputEcx, CPUIDRegs *regs);
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#else // VM_X86_64
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static INLINE void
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__GET_CPUID2(int inputEax, int inputEcx, CPUIDRegs *regs)
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{
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__asm push esi
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__asm push ebx
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__asm push ecx
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__asm push edx
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__asm mov eax, inputEax
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__asm mov ecx, inputEcx
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__asm mov esi, regs
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__asm _emit 0x0f __asm _emit 0xa2
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__asm mov 0x0[esi], eax
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__asm mov 0x4[esi], ebx
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__asm mov 0x8[esi], ecx
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__asm mov 0xC[esi], edx
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__asm pop edx
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__asm pop ecx
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__asm pop ebx
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__asm pop esi
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}
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#endif
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static INLINE uint32
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__GET_EAX_FROM_CPUID(int input)
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{
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#ifdef VM_X86_64
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CPUIDRegs regs;
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__cpuid((int *)®s, input);
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return regs.eax;
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#else
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uint32 output;
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//NOT_TESTED();
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__asm push ebx
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__asm push ecx
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__asm push edx
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__asm mov eax, input
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__asm _emit 0x0f __asm _emit 0xa2
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__asm mov output, eax
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__asm pop edx
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__asm pop ecx
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__asm pop ebx
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return output;
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#endif
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}
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static INLINE uint32
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__GET_EBX_FROM_CPUID(int input)
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{
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#ifdef VM_X86_64
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CPUIDRegs regs;
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__cpuid((int *)®s, input);
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return regs.ebx;
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#else
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uint32 output;
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//NOT_TESTED();
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__asm push ebx
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__asm push ecx
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__asm push edx
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__asm mov eax, input
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__asm _emit 0x0f __asm _emit 0xa2
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__asm mov output, ebx
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__asm pop edx
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__asm pop ecx
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__asm pop ebx
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return output;
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#endif
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}
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static INLINE uint32
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__GET_ECX_FROM_CPUID(int input)
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{
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#ifdef VM_X86_64
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CPUIDRegs regs;
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__cpuid((int *)®s, input);
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return regs.ecx;
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#else
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uint32 output;
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//NOT_TESTED();
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__asm push ebx
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__asm push ecx
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__asm push edx
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__asm mov eax, input
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__asm _emit 0x0f __asm _emit 0xa2
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__asm mov output, ecx
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__asm pop edx
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__asm pop ecx
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__asm pop ebx
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return output;
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#endif
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}
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static INLINE uint32
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__GET_EDX_FROM_CPUID(int input)
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{
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#ifdef VM_X86_64
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CPUIDRegs regs;
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__cpuid((int *)®s, input);
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return regs.edx;
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#else
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uint32 output;
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//NOT_TESTED();
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__asm push ebx
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__asm push ecx
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__asm push edx
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__asm mov eax, input
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__asm _emit 0x0f __asm _emit 0xa2
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__asm mov output, edx
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__asm pop edx
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__asm pop ecx
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__asm pop ebx
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return output;
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#endif
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}
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#ifdef VM_X86_64
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/*
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* No inline assembly in Win64. Implemented in bora/lib/misc in
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* cpuidMasm64.asm.
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*/
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extern uint32
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__GET_EAX_FROM_CPUID4(int inputEcx);
|
||
|
|
|
||
|
|
#else // VM_X86_64
|
||
|
|
|
||
|
|
static INLINE uint32
|
||
|
|
__GET_EAX_FROM_CPUID4(int inputEcx)
|
||
|
|
{
|
||
|
|
uint32 output;
|
||
|
|
|
||
|
|
//NOT_TESTED();
|
||
|
|
__asm push ebx
|
||
|
|
__asm push ecx
|
||
|
|
__asm push edx
|
||
|
|
|
||
|
|
__asm mov eax, 4
|
||
|
|
__asm mov ecx, inputEcx
|
||
|
|
__asm _emit 0x0f __asm _emit 0xa2
|
||
|
|
__asm mov output, eax
|
||
|
|
|
||
|
|
__asm pop edx
|
||
|
|
__asm pop ecx
|
||
|
|
__asm pop ebx
|
||
|
|
|
||
|
|
return output;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif // VM_X86_64
|
||
|
|
|
||
|
|
#else // }
|
||
|
|
#error
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#define CPUID_FOR_SIDE_EFFECTS() ((void)__GET_EAX_FROM_CPUID(0))
|
||
|
|
|
||
|
|
static INLINE void
|
||
|
|
__GET_CPUID4(int inputEcx, CPUIDRegs *regs)
|
||
|
|
{
|
||
|
|
__GET_CPUID2(4, inputEcx, regs);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* The first parameter is used as an rvalue and then as an lvalue. */
|
||
|
|
#define GET_CPUID(_ax, _bx, _cx, _dx) { \
|
||
|
|
CPUIDRegs regs; \
|
||
|
|
__GET_CPUID(_ax, ®s); \
|
||
|
|
_ax = regs.eax; \
|
||
|
|
_bx = regs.ebx; \
|
||
|
|
_cx = regs.ecx; \
|
||
|
|
_dx = regs.edx; \
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
#endif
|